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2023Founder· Y Combinator
Founder · since 2023
Company
Y Combinator
Role
S23 Batch
Stage
—
no public source
Raised
—
no public source
Based
San Francisco Bay Area
Founder / co-founder — the company's markEmployee / research role
Source: LinkedIn work history
Profile coverage5 of 7 · missing posts, contact
Silimate logo
Silimate

Fast, efficient agents for chip design and debug

Summer 2023

Experience

Career

  • Silimate (YC S23) logo

    Silimate (YC S23)

    Co-founder

    Co-Founder & CTO · Mountain View, California, United States · 2023 – Present

    2023
  • Y Combinator logo

    Y Combinator

    Founder

    S23 Batch · San Francisco Bay Area · 2023

    2023
  • Polygence logo

    Polygence

    Student Mentor · United States · 2021 – 2023

    2021
  • Stanford University logo

    Stanford University

    Research Assistant · Stanford, CA · 2018 – 2023

    2018
  • Synopsys Inc logo

    Synopsys Inc

    Research Intern · Mountain View, CA · 2022

    2022
  • Inspirit AI logo

    Inspirit AI

    Instructor · Palo Alto, CA · 2020 – 2022

    2020
  • NVIDIA logo

    NVIDIA

    VLSI CAD Intern · Santa Clara, CA · 2020

    2020
  • Bessemer Venture Partners logo

    Bessemer Venture Partners

    InSITE Fellow · Redwood City, CA · 2019 – 2020

    2019
  • Amazon logo

    Amazon

    Software Engineering Intern · Sunnyvale, CA · 2018

    2018
  • Princeton University logo

    Princeton University

    Head Undergrad TA for ELE 206/COS 306 · Princeton, NJ · 2017 – 2018

    2017
  • Amazon Web Services (AWS) logo

    Amazon Web Services (AWS)

    Software Engineering Intern · Cupertino, CA · 2017

    2017
  • GoFundMe logo

    GoFundMe

    Engineering Intern · Redwood City, CA · 2016

    2016
  • Harvard University logo

    Harvard University

    Summer Research Intern · Cambridge, MA · 2015

    2015
  • Pittsburgh Supercomputing Center logo

    Pittsburgh Supercomputing Center

    Summer Research Intern · Pittsburgh, PA · 2014

    2014

Bio

Co-founder & CTO of Silimate. Akash has a PhD from Stanford in Electrical Engineering, with technical expertise spanning EDA, AI, and cloud through his time at Synopsys, NVIDIA, and AWS. He has taped out 3 chips, published 14 papers on circuit design, and has two pending patents in the EDA space.